FPGA Design
Durham
Engineering&Physical Sciences::Electrical&Comp Engineering
Credits: 6.0
Class Size: 22
Term:
Fall 2024
-
Full Term (08/26/2024
-
12/09/2024)
CRN:
16333
Grade Mode:
Letter Grading
This course covers topics related to field programmable logic devices. Students will be introduced to Hardware Description Language (HDL) design entry languages and simulation procedures, along with common logic synthesis tools. In laboratory exercises, each student will prototype a digital system starting with HDL entry, functional and timing simulations, logic synthesis, device programming, logic probing, and system verification. Labs will develop report writing skills. This course is required for CE majors and optional for EE majors.
Registration Approval Required. Contact Instructor or Academic Department for permission then register through Webcat.
Prerequisite(s): ECE 543 and ECE 562
Instructors:
Diliang Chen
Times & Locations
Start Date | End Date | Days | Time | Location |
---|---|---|---|---|
8/26/2024 | 12/9/2024 | MWF | 2:10pm - 3:00pm | KING N328 |
8/26/2024 | 12/9/2024 | T | 3:10pm - 6:00pm | KING S324 |
Final Exam12/13/2024 | 12/13/2024 | F | 3:30pm - 5:30pm | KING N328 |